1. Field of the Invention
The present invention relates to the wiring pattern of a semiconductor integrated circuit device, and more particularly to the technique of matching the allowance between a connection hole such as a contact hole or through hole, and a wiring.
2. Description of the Related Art
Conventionally, the matching allowance between a connecting hole (e.g., a contact hole or a through hole) and a wiring is set equally around the connecting holes, in order to compensate for the deviation which occurs in the step of lithography, randomly in every direction. when the deviation is zero, the width of the wiring around the connection hole, the around width H, at the periphery of the connecting hole is formed as shown in FIGS. 1A and 1B. FIGS. 1A and 1B illustrate a connecting hole 11, wiring layer 12, and an inter-layer insulation layer 13.
As is shown in FIG. 1B, a notch S is formed in the wiring layer in the connection hole 11. When electric current flows through the connection hole 11, resistance against the current increases at the section where the notch S is located. The wiring resistance around connection hole 11 (to be called "connection hole resistance" hereinafter) can be substituted with an equivalent circuit shown in FIG. 2, which is designed so that when a deviation between the connection hole 11 and the pattern of the wiring 12 is zero, current paths I.sub.2 and I.sub.2 ' on the wiring extension side become wide.
In reality, however, due to a matching error a in the step of pattern matching, a variety of deviations may occur between the connection hole 11 and the wiring layer 12.
FIGS. 3A to 3C illustrate several examples of matching deviation between the connection hole 11 and the wiring layer 12.
FIG. 3A shows a case where the connection hole 11 deviates in the direction opposite to the wiring extension side. In this case, as the around width B.sub.1 narrows, resistances R.sub.3 and R.sub.3 ' inevitably increase. However, electrical current i.sub.3, which is affected by the resistances, comprises a very small portion of the total current. Further, as the around width B.sub.2 widens, resistances R.sub.2 and R.sub.2 ' decrease. Therefore there is little change in connection hole resistance as a whole.
FIG. 3B shows a case where the connection hole 11 deviates in the vertical direction toward the wiring extension side. In this case, around width C.sub.1 narrows and around width C.sub.2 widens. Therefore resistances (R.sub.2 +R.sub.3) and (R.sub.2 '+R.sub.3 ') respectively increase and decrease thereby canceling each other, so that the connection hole resistance is only slightly affected, as a whole.
FIG. 3C shows a case where the connection hole 11 deviates towards the wiring extension side. In this case, around width B.sub.2 narrows, and the effective current paths I.sub.2 and I.sub.2 ' narrow, whereby the connection hole resistance inevitably increases. More specifically, current flows through all of resistances r.sub.1, R.sub.2 and R.sub.3. As around width B.sub.2 narrows, currents I.sub.2 and I.sub.2' flowing through resistances R.sub.2 and R.sub.2 ' decrease, and current i.sub.1 flowing through resistance r.sub.1, which becomes high due to device structure, increases. Therefore, the matching deviation directly affects the connection hole resistance, and disconnection of the wiring due to heat-emission or electromigration may occur at the notch S.